With current microphone technology, microphones typically include individual MEMS die and complementary metal oxide semiconductor (CMOS) die packaged side-by-side, which leads to a large footprint (e.g., approximately 3 millimeters (mm)×3 mm). The excessive size of this footprint limits the applications to which the microphone can be applied. For example, wearable device applications utilize devices having small footprints and, as such, current microphone technology is not well-integrated into wearable device systems. The embodiments described herein can employ a configuration in which the MEMS die and the CMOS die are stacked in some embodiments and, as such, the footprint can be about half the footprint in the side-by-side configuration.
Further, some microphones disadvantageously include a port though the CMOS die thereby sacrificing a significant portion of the CMOS die area and increasing total cost. Additionally, many microphones are bottom port configuration, which results in the port at which acoustic waves are received being located at the chip electrical connection side of the device. As a result, when customers want to surface mount the microphone chip to a PCB, the customers need to open a port on the PCB, which increases complexity. In some cases, bottom port microphone packages laminate substrates also sacrifice port opening and seal ring area to provide area for more pin connections.